Type

Conference Proceedings

Authors

Noel E. O'Connor
Valentin Muresan
Andrew Kinane
Daniel Larkin

Subjects

Computer Science

Topics
hardware architecture activation algorithms generator genetic algorithm neural network computer networks artificial neural network

An efficient hardware architecture for a neural network activation function generator (2006)

Abstract This paper proposes an efficient hardware architecture for a function generator suitable for an artificial neural network (ANN). A spline-based approximation function is designed that provides a good trade-off between accuracy and silicon area, whilst also being inherently scalable and adaptable for numerous activation functions. This has been achieved by using a minimax polynomial and through optimal placement of the approximating polynomials based on the results of a genetic algorithm. The approximation error of the proposed method compares favourably to all related research in this field. Efficient hardware multiplication circuitry is used in the implementation, which reduces the area overhead and increases the throughput.
Collections Ireland -> Dublin City University -> Publication Type = Conference or Workshop Item
Ireland -> Dublin City University -> Subject = Computer Science
Ireland -> Dublin City University -> DCU Faculties and Centres = Research Initiatives and Centres: Centre for Digital Video Processing (CDVP)
Ireland -> Dublin City University -> Status = Published
Ireland -> Dublin City University -> Subject = Computer Science: Algorithms
Ireland -> Dublin City University -> Subject = Computer Science: Computer networks
Ireland -> Dublin City University -> DCU Faculties and Centres = Research Initiatives and Centres

Full list of authors on original publication

Noel E. O'Connor, Valentin Muresan, Andrew Kinane, Daniel Larkin

Experts in our system

1
Noel E. O'Connor
Dublin City University
Total Publications: 420